澳门六合彩开奖记录

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BI1EE17 - Electronics

澳门六合彩开奖记录

BI1EE17-Electronics

Module Provider: School of Biological Sciences
Number of credits: 20 [10 ECTS credits]
Level:4
Terms in which taught: Autumn / Spring term module
Pre-requisites:
Non-modular pre-requisites:
Co-requisites:
Modules excluded:
Current from: 2023/4

Module Convenor: Dr Sillas Hadjiloucas
Email: s.hadjiloucas@reading.ac.uk

Type of module:

Summary module description:
This module provides a foundation in the theory that supports the understanding of DC and AC (frequency dependent) circuits, and circuits that contain logic elements and Operational Amplifiers (Op-Amps). This module also introduces the analysis and design of such circuits.

Aims:
This aim of this module is to provide students with the background knowledge, theory, skills and tools to enable them to analyse and design simple electronic circuits that consist of the most common components and elements that include voltage and current sources, resistors, capacitors, inductors, logic gates and operational amplifiers.

Assessable learning outcomes:

By the end of the module the students should be able to do the following when given sufficient information:




  • Recognise, and describe and apply the theory underpinning, voltage and current sources, resistors, capacitors, inductors, logic gates and operational amplifiers.

  • Analyse circuits consisting of voltage and current sources, resistors, capacitors, inductors, logic gates and operational amplifiers, and determine the currents, voltages and power outputs of such circuits.

  • For AC (frequency dependent) circuits, be able to describe and calculate the behaviour of such circuits in the frequency domain, specifically how the gain of such circuits varies with frequency and also to be able to identify common filter types such as low-pass and high-pass.

  • Perform analysis of logic circuits and form, manipulate and simplify logical expressions.

  • Analyse circuits that include Op-Amps, including the application of feedback.


Additional outcomes:

Outline content:

Logic: (5 lectures) gates, levels, Boolean algebra, multiplexers, demultiplexers, encoders and decoders.



Circuits: (20 lectures) Fundamental concepts, power sources and electronic components. Passive and active circuits. Network analysis, Kirchhoff's laws, Thevenin and Norton's theorems. Representation of electrical signals, vector diagrams, complex representations for ac signals. Free and forced response of circuits containing L, C and R. System response, Q factor and resonance. Frequency response, first and second-order filters. Power in ac circuits, rms values, power factor.



Op-amps (10 lectures) Op-amps are useful electronic components which in practise are connected in feedback loops. This strand covers ideal op-amps, effect of negative feedback, non-inverting and inverting voltage amplifiers, op-amp's limitations, special purpose networks, instrumentation amplifiers, active filters, non-linear feedback, voltage comparators, positive feedback and its applications. Level shifters, voltage and current references. Sample and hold, analog multiplexers, Schmitt triggers, and oscillators.



Semiconductor devices (5 lectures): Atomic structure and electrons. Insulators, conductors and semiconductors. Intrinsic and extrinsic semiconductors. Majority and minority carriers. p-n junction diodes. Zener diodes. Light emitting diodes. Bipolar junction Transistors (the Common Emitter and Common Collector amplifiers, the Differential Amplifier, Operational Amplifiers and configurations), Field Effect Transistors.


Brief description of teaching and learning methods:
The module comprises 2 lectures per week, associated laboratory practicals and some revision tutorials. Laboratory practicals are used to reinforce the relevant lectures.

Contact hours:
Autumn Spring Summer
Lectures 20 20
Practicals classes and workshops 9 9
Guided independent study: 71 71
Total hours by term 100 100
Total hours for module 200

Summative Assessment Methods:
Method Percentage
Written exam 70
Set exercise 30

Summative assessment- Examinations:

One 3-hour examination paper in May/June.



The examination for this module will require a narrowly defined time window and is likely to be held in a dedicated exam venue.


Summative assessment- Coursework and in-class tests:

Formative assessment methods:

Penalties for late submission:

The Support Centres will apply the following penalties for work submitted late:

  • where the piece of work is submitted after the original deadline (or any formally agreed extension to the deadline): 10% of the total marks available for that piece of work will be deducted from the mark for each working day (or part thereof) following the deadline up to a total of five working days;
  • where the piece of work is submitted more than five working days after the original deadline (or any formally agreed extension to the deadline): a mark of zero will be recorded.
The University policy statement on penalties for late submission can be found at: /cqsd/-/media/project/functions/cqsd/documents/cqsd-old-site-documents/penaltiesforlatesubmission.pdf
You are strongly advised to ensure that coursework is submitted by the relevant deadline. You should note that it is advisable to submit work in an unfinished state rather than to fail to submit any work.

Assessment requirements for a pass:
40%

Reassessment arrangements:

Examination only

One 3-hour examination paper in University resit period.


Additional Costs (specified where applicable):

1) Required text books:听 None

2) Specialist equipment or materials:听 None

3) Specialist clothing, footwear or headgear:听 None

4) Printing and binding:听 None

5) Computers and devices with a particular specification:听 None

6) Travel, accommodation and subsistence:听 None


Last updated: 30 March 2023

THE INFORMATION CONTAINED IN THIS MODULE DESCRIPTION DOES NOT FORM ANY PART OF A STUDENT'S CONTRACT.

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